1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device. Note specifically, the present invention is concerned with a semiconductor manufacturing method which allows a semiconductor chid of a given large size to be embedded within a packaged semiconductor device of standardized size while ensuring a high quality an reliability of the semiconductor device as well as high yield thereof.
2. Description of Related Art
A semiconductor device implemented in a package structure such as shown in FIG. 16 is known and widely used. For better understanding of the invention, technical background thereof will be described in some detail.
Referring to FIG. 6, a semiconductor device 100 known heretofore includes a die pad 101 having die pad suspending leads 102. Mounted on the die pad 101 is a semiconductor chip 110 having electrodes 111 which are electrically connected to a plurality of connecting leads 103 disposed along and around an outer periphery of the die pad 101 by bonding with metal wires 112 such as gold wires, aluminum wires or the like. The semiconductor electric circuit chip realized in this manner is hermetically embedded as a whole within a package 120 of an insulating material such as a resin with outer end portions (i.e., outer lead potions) of the connecting leads 103 being exposed outwardly from the insulating material.
For manufacturing the semiconductor device 100 of the structure described above, a sheet-like lead frame composed of the clue pad 101, the die pad suspending leads and the connecting leads 103 formed integrally with one another is prepared. After forming electrical connections between the semiconductor chip 110 mounted on the die pad and the connecting leads 103 by bonding the metal wires at both ends thereof, respectively, the sheet-like lead frame is disposed within a molding die with die pad suspending leads 102 projecting, respectively, from both opposite sides of the die pad 101 supported between abutting surfaces of molding dies superposed on each other. In this state, the molding chamber defined by the dies is filled with a molten resin material for forming the package 120. After hardening of the resin, the package 120 is removed from the metal mold and those portions of the die pad suspending leads 102 which project from the outer peripheral surface of the packages 120 are cut away with the connecting leads 103 being cut to a predetermined length.
By the way, the sheet-like lead frame and the inner end portions (inner leads) of the connecting leads 103 are disposed flush with the die pad 101 i.e., in the same plane. Consequently, the connecting leads 103 assume considerably lower positions relative to the top surface of the semiconductor chip 110. As a result of this, when the metal wires 112 are connected to the connecting leads 103, there may arise such an unwanted situation in which the metal wire 112 is brought into physical contact with the semiconductor chip 110 to thereby form a short-circuit, as is illustrated in FIG. 18 within a solid outline circle.
In the semiconductor device 100 known heretofore, the problem mentioned above is coped with by applying a stamping force on the die pad 101 and a base portion of the die pad suspending leads 102 connected to the die pad 101 upon manufacturing of the lead frame, as shown in FIG. 17, so that the connecting leads 103 are lifted to positions close to the top surface of the semiconductor chip 110 to thereby prevent the metal wires 112 from contacting the semiconductor chip 110, as indicated by phantom lines in FIG. 18.
Thus, in the semiconductor device 100 as manufactured, the base portion of each of the die pad suspending leads 102 has a downwardly bent portion (hereinafter referred to as the offset portion) as shown in FIG. 17. The die pad 101 connected integrally to the die pad suspending leads 102 is positioned at a lower level relative to the connecting leads 103, wherein the bent or offset portions 102a are completely encapsulated or embedded within the package 120 having a large thickness.
The hitherto known semiconductor device 100 of the structure in which the offset portions 102a are completely encapsulated within the package 120 however suffers from a problem that difficulty is encountered in attempting to increase the size of the semiconductor chip 110 incorporated in the semiconductor device 100 having predetermined standardized outer dimensions because of the obstacle presented by the offset portion 102a.
More specifically, since the design length of the offset portion 102a needs to be selected relatively large, on the order of 0.1 mm to 0.7 mm, the thickness of the resin package 120 will increase beyond a limit required for preventing occurrence of cracks, invasion of moisture and others. As a result of this, in the semiconductor device 100 having a standardized outer dimension L1, limitation will necessarily be imposed on the size L2 of the semiconductor chip 110 which can be encapsulated within the package 120, making it impossible to incorporate the semiconductor chip 110 of a large size in the semiconductor device.
Such being the circumstances, the conventional manufacturing method described above cannot be applied to the manufacture of the semiconductor device destined for use as a memory device, among others. The devices are required to incorporate semiconductor chips of large size in order to meet a demand for miniaturization and high density integration of the semiconductor device which has become very prominent in recent years accompanying a trend of downsizing of computers or the like systems in which the semiconductor devices find applications.
In conjunction with the semiconductor device 100 known heretofore, it must further be pointed out that because the offset portion 102a is formed by applying a stamping force to the offset portion 102a by resorting to a press forming process or the like in order to lower the position of the die pad 101, the offset portion 102a will mechanically be stretched or elongated, which results in degradation in the mechanical strength of the offset portion.
As a consequence, when the molten resin is poured or injected into the molding die in the state in which the die pad 101 is supported on the metal mold by the die pad suspending leads 102 extending laterally from the die pad 101 in opposite directions, respectively, the offset portions 102a are likely to be displaced upwardly or downwardly or twisted and thus deviated from the predetermined position, these deviations give rise to a problem that not only the quality but also the reliability of the semiconductor device 100 are degraded. Of course, the yield of the finished product is lowered.
For coping with the problems mentioned above, it is conceivable to provide the die pad 101 or the lead frame 106 having the connecting leads 103 connected thereto with the die pad suspending leads 102 in pairs. To be more specific, a pair of die pad suspending leads 102 are provided at each of opposite sides of the die pad 101 to thereby compensate for degradation in the mechanical strength brought about by the stamping force.
However, when the lead frame 106 is implemented in the structure described just above, it will then become difficult or impossible to position the inner lead 103-1 within the area enclosed by the two die pad suspending leads 102 (hatched area G in FIG. 19).
Further, with the structure described above, a distance K between the inner lead 103-1 and the electrode 111 of the semiconductor chip 110 will increase, involving difficulty in interconnecting the inner lead 103-1 and the semiconductor chip 110 by the metal wires 112 whose length is previously standardized.